Maxim Integrated Recruitment 2021 | Associate Engineer | BE/ B.Tech/ ME/ M.Tech | Bangalore

Maxim Integrated Recruitment 2021 | Associate Engineer | BE/ B.Tech/ ME/ M.Tech | Bangalore

Maxim Integrated Recruitment 2021 | Associate Engineer | BE/ B.Tech/ BS/ ME/ M.Tech/ MS – Electrical/ Electronics Engineering | Bangalore

Company: Maxim Integrated
Maxim Integrated Recruitment 2021: Maxim Integrated is an American, publicly traded company that designs, manufactures, and sells analog and mixed-signal integrated circuits. Maxim Integrated develops integrated circuits (ICs) for the automotive, industrial, communications, consumer, and computing markets. Headquartered in San Jose, California, the company has design centers, manufacturing facilities, and sales offices throughout the world.
Maxim Integrated Recruitment 2021
Headquartered in the heart of Silicon Valley with over two billion dollars in sales and more than 7,000 employees, Maxim Integrated is a worldwide leader in designing, manufacturing and selling high-performance semiconductor products.

Company Website: www.maximintegrated.com

Positions: Associate MTS, EDA Engineer

Experience: 2 years

Job Location: Bangalore

Salary: Best In Industry

Education: B.Tech/ BS/ ME/ M.Tech/ MS – Electrical/ Electronics Engineering

Job Description:

Maxim Integrated Products is seeking a highly motivated EDA engineer to work in a team-oriented environment to provide PDK support and QA as well as developing flows and methodologies for complex analog/mixed-signal IC design

This engineer will work in a team-oriented environment. Responsibilities and Duties include but not limited to:

  • Developing symbols and layout pcells for devices
  • Writing physical verification rule files for DRC, LVS, and DFM
  • Implementing automation tools for QA testing.
  • Run, debug, and provide feedback to developers on the results of our QA test suite

Requirements:

  • BSEE/MSEE or equivalent with at least 2 years of experience in developing or supporting PDKs
  • Experience in using or supporting Cadence analog IC layout tools (Virtuoso)
  • Experience in using or supporting physical verification tools from Cadence (PVS), Mentor (Calibre), or Synopsys (Hercules/ICV)
  • Proficient with scripting languages (Perl/Tcl/Python)
  • Well organized, independent and self-motivated
  • Ability to work in a fast-paced environment and to deliver assigned projects on time
  • Excellent verbal and written communication skills

Preferred:

  • Proficiency in Cadence SKILL / SKILL++ scripting
  • Experience in PDK Development areas: CDF, Callbacks, Pcells, Techfile
  • Knowledge of parasitic extraction/LPE calibration process

Apply Link: Click Here

IMPORTANT! Join our Daily Updates groups on Telegram: 

Sharing is Always Good.

SHare this job opportunity!

Share on whatsapp
Share on email
Share on linkedin
Share on facebook